Computer code, instructions, user data and other kinds of data have been stored in main memories and peripheral memories that employ a wide variety of technologies. Main memories often use dynamic-random-access memory (DRAM), while faster cache memories and on-chip memories may use static random-access memory (SRAM). Read-only-memory (ROM) may use fuses or masked metal options, or may use electrically-erasable programmable read-only memory (EEPROM) cells. These are randomly-accessible memories since individual words can be read or written without disturbing nearby data. Often individual bytes may be written.
Mass storage memory is block-addressable, where a block of 512 or more bytes must be read or written together as a block. Individual words of 64 bytes or less cannot be separately written without re-writing the whole 512-byte block. Mass storage devices include rotating magnetic disks, optical disks, and EEPROM arranged as flash memory.
Traditionally, flash memory has been used for non-volatile storage. Another kind of non-volatile memory, phase-change memory, was discovered in the 1960's, and was even written about in a paper in Electronics magazine in September 1970 by the founder of Intel Corp., Gordon Moore. However, despite the long-felt need, this 40-year-old technology has not yet been widely used in personal computers and other systems.
Phase-change memory (PCM) uses a layer of chalcogenide glass that can be switched between a crystalline and an amorphous state. The chalcogenide glass layer can be an alloy of germanium (Ge), antimony (Sb), and tellurium (Te). This alloy has a high melting point, which produces the amorphous state when cooled from the melting point. However, when the solid alloy is heated from the amorphous state, the alloy transforms into a crystalline state at a crystallization temperature than is below its melting point. Such heating can be provided by an electric current through the alloy. The state change may occur rapidly, such as in as little as 5 nanoseconds.
One problem with phase-change memory is the relatively high current required to reset memory cells into the amorphous state, compared with the lower current required to set memory cells into the crystalline state. The peak reset current can be double or more the peak set current. This difference in peak currents can cause a data dependency to current drain in a PCM chip.
The differing peak currents may cause unwanted side effects, such as I-R voltage drops on power or ground lines within or external to the PCM chip, and data disturbance or even data loss in extreme cases. The surging peak currents may exceed the filtering provided by capacitors internal or external to the PCM chips. Since the peak currents are data-dependent, failures may occur sporadically and be hard to detect, and even harder to trace back to specific data patterns.
What is desired is a phase-change memory that is less sensitive to peak currents that vary for amorphous and crystalline states. A phase-change memory that compensates for peak current variations between amorphous and crystalline states is desirable. A phase-change memory that detects data patterns that can cause excessive peak currents and that can alter these data patterns to reduce peak currents is desirable.